As can be seen from Fig. 7, when adjusting the capacitance value of LDO output, the voltage dip will also become gentle. At the same time, the following two methods are adopted:
1) the LDO output series inductor is used to suppress the transient high current when the chip starts up through the saturation current of the inductor.
2) topology adjustment of input and output ends of the capacitor LDO, drop by the energy storage capacitor elimination.
Figure 8: an improved circuit
The load change rate of LDO is also a very important parameter, which is often a blind spot in the design. Finally, the author's circuit is shown in Figure 8. The inductor L1 and C77 are adjusted to 1000uF, and the restart is successfully solved.
In the application of LDO chip, load adjustment rate is also a very important parameter. This parameter should be valued at the beginning of the selection of new product design. For the old products already used, when the load adjustment rate can not meet the requirements of actual use, the power design can meet the requirements of the system by controlling the instantaneous power of the back end load circuit and adjusting the topology structure of the LDO cascade, so that the product can run steadily.
The traditional DC-DC generally requires the input and output differential pressure to be over 2 ~ 3V. With the development of the times, such conditions can no longer meet the needs of practical applications.
For example, in the field of wireless communications, the voltage commonly used by GPRS modules is 4V, often through 5V conversion, and the input and output differential pressure should be as low as 1V.
针对这样的情况，于是LDO（Low dropout regulator）应运而生。
In view of this situation, LDO (Low dropout regulator) came into being.
Relative to DC-DC, LDO has the advantage of low noise and small quiescent current.
Many DC-DC also need inductor and continuous current diode in the peripheral circuit, and the typical circuit of LDO is very simple. Many LDO only need to connect a bypass capacitor at the input and output side to work steadily, and it is also advantageous to save the layout space of PCB.
Many of the LDO introduced by Ricoh also have other functions, such as load short circuit protection, overvoltage shutdown, overheat shutdown, reverse connection protection and so on.
In the application of LDO, many hardware engineers mainly consider the range of input voltage, output voltage and current, voltage difference, ripple, power consumption, static current and so on. However, it often ignores a very important parameter: load adjustment rate.
In this paper, the author took the problem of ignoring the load adjustment rate when applying the XC9516 of Ricoh, and finally shared some experience through the process of improving the design.
The circuit of the author is shown in Figure 1. The system 12V is converted to 5V, and 5V is converted to 3.3V and 4V for MCU and communication module respectively.
Since the communication module is opened and closed regularly, it is found that the system can work normally as long as the U12 (XC9516) can be used as a low level, and the whole system is reset when the MOD_EN is high.
Figure 1: the original schematic of the author's design
The author initially suspected that the back end of the 4V circuit was short circuited, causing the 5V power to be pulled down, but the possibility of 4V short circuit was ruled out because the 6 prototype would all have this problem.
In fact, there are also the watchdog and power monitoring design in the circuit, as shown in Figure 2, the problem occurs here, where the PW_EN foot directly controls the LDO chip of the 5V to 3.3V.
Figure 2: a watchdog circuit
First, the waveforms of all the power sources in the MOD_EN are measured, and the waveforms are shown in Figure 3.
Figure 3: the power waveform of the system
Waveform analysis: from top to bottom, the graph is 12V, 5V, 4V, 3.3V waveform. 3.3V is lowered 184ms in the diagram. It needs to further look at the peak details of the 5V and 4V power lines.
After enlarging the above waveform, we get the waveforms shown in Figure 4.
Figure 4: power waveform magnification of the system
Waveform analysis: from top to bottom, the waveform is 12V, 5V, 4V and 3.3V.
The 5V voltage in the diagram is pulled to 2.3V. When the voltage is less than 2.63V, 706 will output the 200mS reset signal.
The measured time 184mS, within the range of measurement error, is close to 706 of the power monitoring and reset time, and can continue to monitor the 706 reset signal, and get the waveform as shown in Figure 5 and 6.
Figure 5: the reset signal of the watchdog 706
Waveform analysis: from top to bottom, the waveform is 12V, 5V, 4V and PW_EN.
At the instant of 4V jump, RST outputs a low level reset signal, and transfers the 5V to 3.3V LDO to the bottom.
Figure 6: reset waveform details
Waveform analysis: before the 5V fall back to 3V, the watchdog 706 output the low level reset signal, and the reset signal is divided into two sections, the turn point appears before and after the power supply voltage 2.65V, the fall waveform before the turning point is synchronized with the 5V power supply voltage, and the drop wave after the turning point is watched by the dog chip 706 monitoring the power supply voltage below 2.6 The reset signal of the 3V output.
The rate of load adjustment in figure 7:XC9516 manual
By looking at the device manual of XC9516, it is found that when the load suddenly increases, the output voltage will drop instantaneously because it can not be adjusted in time.
In the system, in the system, when the energy end of the 4V power LDO is made, the LDO input and output have a certain instantaneous voltage drop due to the load of the LDO back end and the impulse of the output. The system pulls the 12V down to 9.6V, and the more serious is to lower the 5V level to below 2.6V in 50uS, and 4.7V is lower to 2.6V below, causing the power monitoring chip 70. 6 output reset signal, which leads to system restart.