The ME1303S is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching and low in-line power loss are needed in a very small outline surface mount package.
● RDS(ON) ≦95mΩ@VGS=-4.5V
● RDS(ON) ≦120mΩ@VGS=-2.5V
● RDS(ON) ≦180mΩ@VGS=-1.8V
● Super high density cell design for extremely low RDS(ON)
● Exceptional on-resistance and maximum DC current capability